Friday, November 04, 2005

Week 544 Summary

This week I am into clock tree synthesis. As I mentioned last week, I have went through some documents. My job is more or less following the clock tree structure in old design and building one in our new design. As a very novice to encounter, I made stupid mistakes but got it done finally. Before I left office today, I found a big problem that six important clock subtrees are not generated. So I will investigate it next week.
Mr. CTO will give us a town meeting next week and I might think of some questions to ask him. Do you have any ideas? One question is of the end of Moore's law. I wonder whether it's time to stop decrease the gate length and fortify system solution one chip can achieve. Also I am interested in Philips' view on future of RFID.
Let me back to project. I think I am still climbing the learning curve. Since it's my first real project and it's quite complicated, I have not done very well so far. I should spend time on thinking of it. I am really eager to do better and show my possiblity.

posted by philewar @ 11/04/2005 11:37:00 PM 

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